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RTEMS on MCP750 and MTX-60x, for Eric Valette
- Date: Thu, 7 Nov 2002 13:52:35 -0500 (EST)
- From: gregory.menke at gsfc.nasa.gov (gregory.menke at gsfc.nasa.gov)
- Subject: RTEMS on MCP750 and MTX-60x, for Eric Valette
Hi Eric,
I'm sending this email thru the list because I don't have a valid
email addres for you;
I'm putting together a bsp for the Motorola MTX-60x boards using your
work on the motorola_powerpc bsp. I have it working (with ethernet
going too... :) ) but with the cache & mmu off and would like to get
those set up before I submit the bsp to Joel. I started reconciling
the HID0 bits for the 603e and the 750 and had a couple questions;
- In registers.h, you lay out the HID0 bits as leftwards bit shifts,
but the Motorola docs lay out the bits with LSB leftmost, so the
shifting looks backwards. Is this just Motorola being backwards
with their documentation?
- More importantly, it looks like the 603e has a different HID0 layout
than the 750, a number of the bits are defined in different ways,
and registers.h seems to correspond to the 750. Are you aware of
issues like this between the two processors?
Thanks for any information,
Greg